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https://github.com/official-stockfish/Stockfish.git
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Add intrinsics for LSX and LASX
This adds actual intrinsics of SIMD on loongarch64, with considerable performance improvements. Benchmark on `Loongson-3A6000-HV Not Specified CPU @ 2.5GHz` Baseline GCC 14 (debian trixie): ``` =========================== Total time (ms) : 17816 Nodes searched : 2336177 Nodes/second : 131128 ``` With this PR: GCC 16 (debian sid): ``` ./stockfish compiler Stockfish dev-20260516-52e8d9ef by the Stockfish developers (see AUTHORS file) Compiled by : g++ (GNUC) 16.1.0 on Linux Compilation architecture : loongarch64-lasx Compilation settings : 64bit LASX LSX Compiler __VERSION__ macro : 16.1.0 =========================== Total time (ms) : 3518 Nodes searched : 2336177 Nodes/second : 664063 ``` ``` ./stockfish compiler Stockfish dev-20260516-52e8d9ef by the Stockfish developers (see AUTHORS file) Compiled by : g++ (GNUC) 16.1.0 on Linux Compilation architecture : loongarch64-lsx Compilation settings : 64bit LSX Compiler __VERSION__ macro : 16.1.0 =========================== Total time (ms) : 4944 Nodes searched : 2336177 Nodes/second : 472527 ``` clang 22 (debian sid): ``` ./stockfish compiler Stockfish dev-20260516-52e8d9ef by the Stockfish developers (see AUTHORS file) Compiled by : clang++ 22.1.5 on Linux Compilation architecture : loongarch64-lasx Compilation settings : 64bit LASX LSX Compiler __VERSION__ macro : Debian Clang 22.1.5 (1) =========================== Total time (ms) : 3401 Nodes searched : 2336177 Nodes/second : 686908 ``` ``` ./stockfish compiler Stockfish dev-20260516-52e8d9ef by the Stockfish developers (see AUTHORS file) Compiled by : clang++ 22.1.5 on Linux Compilation architecture : loongarch64-lsx Compilation settings : 64bit LSX Compiler __VERSION__ macro : Debian Clang 22.1.5 (1) =========================== Total time (ms) : 5501 Nodes searched : 2336177 Nodes/second : 424682 ``` GCC 14 (debian trixie): ``` ./stockfish compiler Stockfish dev-20260516-52e8d9ef by the Stockfish developers (see AUTHORS file) Compiled by : g++ (GNUC) 14.2.0 on Linux Compilation architecture : loongarch64-lasx Compilation settings : 64bit LASX LSX Compiler __VERSION__ macro : 14.2.0 =========================== Total time (ms) : 3559 Nodes searched : 2336177 Nodes/second : 656413 ``` ``` ./stockfish compiler Stockfish dev-20260516-52e8d9ef by the Stockfish developers (see AUTHORS file) Compiled by : g++ (GNUC) 14.2.0 on Linux Compilation architecture : loongarch64-lsx Compilation settings : 64bit LSX Compiler __VERSION__ macro : 14.2.0 =========================== Total time (ms) : 5212 Nodes searched : 2336177 Nodes/second : 448230 ``` clang 19 (debian trixie): ``` ./stockfish compiler Stockfish dev-20260516-52e8d9ef by the Stockfish developers (see AUTHORS file) Compiled by : clang++ 19.1.7 on Linux Compilation architecture : loongarch64-lasx Compilation settings : 64bit LASX LSX Compiler __VERSION__ macro : Debian Clang 19.1.7 (3+b1) =========================== Total time (ms) : 4830 Nodes searched : 2336177 Nodes/second : 483680 ``` ``` ./stockfish compiler Stockfish dev-20260516-52e8d9ef by the Stockfish developers (see AUTHORS file) Compiled by : clang++ 19.1.7 on Linux Compilation architecture : loongarch64-lsx Compilation settings : 64bit LSX Compiler __VERSION__ macro : Debian Clang 19.1.7 (3+b1) =========================== Total time (ms) : 5568 Nodes searched : 2336177 Nodes/second : 419572 ``` closes https://github.com/official-stockfish/Stockfish/pull/6815 No functional change
This commit is contained in:
Wencey Wang
committed by
Joost VandeVondele
Joost VandeVondele
parent
0366d092a8
commit
ffffe1bdb5
+187
@@ -33,6 +33,13 @@
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#elif defined(USE_NEON)
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#include <arm_neon.h>
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#elif defined(USE_LASX)
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#include <lasxintrin.h>
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#include <lsxintrin.h>
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#elif defined(USE_LSX)
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#include <lsxintrin.h>
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#endif
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#include "../types.h"
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@@ -226,6 +233,150 @@ inline int16x8_t vaddw_high_s8(int16x8_t a, int8x16_t b) { return vaddw_s8(a, vg
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inline int16x8_t vsubw_high_s8(int16x8_t a, int8x16_t b) { return vsubw_s8(a, vget_high_s8(b)); }
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#endif
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#elif USE_LASX
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using vec_t = __m256i;
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using vec_i8_t = __m128i;
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using vec128_t = __m128i;
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using psqt_vec_t = __m256i;
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using vec_uint_t = __m256i;
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inline __m256i lasx_load256(const __m256i* a) {
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return __lasx_xvld(reinterpret_cast<const void*>(a), 0);
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}
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inline void lasx_store256(__m256i* a, __m256i b) { __lasx_xvst(b, reinterpret_cast<void*>(a), 0); }
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inline __m256i lasx_packus_16(__m256i a, __m256i b) {
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#if defined(__clang__) && defined(__has_builtin) && __has_builtin(__builtin_lasx_xvssrani_bu_h)
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return (__m256i) __builtin_lasx_xvssrani_bu_h((v32i8) b, (v32i8) a, 0);
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#else
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return __lasx_xvssrani_bu_h(b, a, 0);
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#endif
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}
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inline __m256i lasx_packus_32(__m256i a, __m256i b) {
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#if defined(__clang__) && defined(__has_builtin) && __has_builtin(__builtin_lasx_xvssrani_hu_w)
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return (__m256i) __builtin_lasx_xvssrani_hu_w((v16i16) b, (v16i16) a, 0);
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#else
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return __lasx_xvssrani_hu_w(b, a, 0);
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#endif
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}
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#define vec_load(a) lasx_load256(a)
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#define vec_store(a, b) lasx_store256(a, b)
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#define vec_add_16(a, b) __lasx_xvadd_h(a, b)
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#define vec_sub_16(a, b) __lasx_xvsub_h(a, b)
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#define vec_mulhi_16(a, b) __lasx_xvmuh_h(a, b)
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#define vec_zero() __lasx_xvldi(0)
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#define vec_set_16(a) __lasx_xvreplgr2vr_h(a)
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#define vec_max_16(a, b) __lasx_xvmax_h(a, b)
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#define vec_min_16(a, b) __lasx_xvmin_h(a, b)
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#define vec_slli_16(a, b) __lasx_xvslli_h(a, b)
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// Inverse permuted at load time
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#define vec_packus_16(a, b) lasx_packus_16(a, b)
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#define vec_load_psqt(a) lasx_load256(a)
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#define vec_store_psqt(a, b) lasx_store256(a, b)
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#define vec_add_psqt_32(a, b) __lasx_xvadd_w(a, b)
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#define vec_sub_psqt_32(a, b) __lasx_xvsub_w(a, b)
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#define vec_zero_psqt() __lasx_xvldi(0)
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#define vec_nnz(a) lasx_vec_nnz(a)
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#define vec_convert_8_16(a) lasx_cvtepi8_epi16(a)
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#define vec128_zero __lsx_vldi(0)
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#define vec128_set_16(a) __lsx_vreplgr2vr_h(a)
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#define vec128_load(a) (*(a))
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#define vec128_storeu(a, b) *(a) = (b)
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#define vec128_add(a, b) __lsx_vadd_h(a, b)
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#define NumRegistersSIMD 24
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#define MaxChunkSize 32
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inline __m256i lasx_cvtepi8_epi16(__m128i a) {
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#if defined(__has_builtin) && __has_builtin(__builtin_lasx_cast_128)
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return __lasx_vext2xv_h_b(__lasx_cast_128(a));
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#elif defined(__GNUC__) && !defined(__clang__)
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__m256i out;
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__asm__("vext2xv.h.b %u0, %u1" : "=f"(out) : "f"(a));
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return out;
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#else
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int64_t lo = (int64_t) __lsx_vpickve2gr_d(a, 0);
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int64_t hi = (int64_t) __lsx_vpickve2gr_d(a, 1);
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__m256i v = __lasx_xvldi(0);
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v = __lasx_xvinsgr2vr_d(v, lo, 0);
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v = __lasx_xvinsgr2vr_d(v, hi, 2);
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return __lasx_xvsllwil_h_b(v, 0);
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#endif
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}
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inline int lasx_vec_nnz(__m256i a) {
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const __m256i cmp = __lasx_xvslt_w(__lasx_xvldi(0), a);
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const __m256i msk = __lasx_xvmskltz_w(cmp);
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return ((int) __lasx_xvpickve2gr_w(msk, 0) & 0xF)
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| (((int) __lasx_xvpickve2gr_w(msk, 4) & 0xF) << 4);
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}
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#elif USE_LSX
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using vec_t = __m128i;
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using vec_i8_t = std::uint64_t;
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using vec128_t = __m128i;
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using psqt_vec_t = __m128i;
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using vec_uint_t = __m128i;
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inline __m128i lsx_packus_16(__m128i a, __m128i b) {
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#if defined(__clang__) && defined(__has_builtin) && __has_builtin(__builtin_lsx_vssrani_bu_h)
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return (__m128i) __builtin_lsx_vssrani_bu_h((v16i8) b, (v16i8) a, 0);
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#else
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return __lsx_vssrani_bu_h(b, a, 0);
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#endif
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}
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inline __m128i lsx_packus_32(__m128i a, __m128i b) {
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#if defined(__clang__) && defined(__has_builtin) && __has_builtin(__builtin_lsx_vssrani_hu_w)
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return (__m128i) __builtin_lsx_vssrani_hu_w((v8i16) b, (v8i16) a, 0);
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#else
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return __lsx_vssrani_hu_w(b, a, 0);
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#endif
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}
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#define vec_load(a) (*(a))
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#define vec_store(a, b) *(a) = (b)
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#define vec_add_16(a, b) __lsx_vadd_h(a, b)
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#define vec_sub_16(a, b) __lsx_vsub_h(a, b)
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#define vec_mulhi_16(a, b) __lsx_vmuh_h(a, b)
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#define vec_zero() __lsx_vldi(0)
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#define vec_set_16(a) __lsx_vreplgr2vr_h(a)
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#define vec_max_16(a, b) __lsx_vmax_h(a, b)
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#define vec_min_16(a, b) __lsx_vmin_h(a, b)
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#define vec_slli_16(a, b) __lsx_vslli_h(a, b)
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// Inverse permuted at load time
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#define vec_packus_16(a, b) lsx_packus_16(a, b)
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#define vec_load_psqt(a) (*(a))
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#define vec_store_psqt(a, b) *(a) = (b)
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#define vec_add_psqt_32(a, b) __lsx_vadd_w(a, b)
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#define vec_sub_psqt_32(a, b) __lsx_vsub_w(a, b)
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#define vec_zero_psqt() __lsx_vldi(0)
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inline int lsx_vec_nnz(__m128i a) {
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const __m128i cmp = __lsx_vslt_w(__lsx_vldi(0), a);
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const __m128i msk = __lsx_vmskltz_w(cmp);
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return ((int) __lsx_vpickve2gr_w(msk, 0) & 0xF);
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}
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#define vec_nnz(a) lsx_vec_nnz(a)
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inline __m128i vec_convert_8_16(std::uint64_t x) {
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__m128i v = __lsx_vldrepl_d(reinterpret_cast<const void*>(&x), 0);
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return __lsx_vsllwil_h_b(v, 0);
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}
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#define vec128_zero __lsx_vldi(0)
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#define vec128_set_16(a) __lsx_vreplgr2vr_h(a)
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#define vec128_load(a) (*(a))
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#define vec128_storeu(a, b) *(a) = (b)
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#define vec128_add(a, b) __lsx_vadd_h(a, b)
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#define NumRegistersSIMD 24
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#define MaxChunkSize 16
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#else
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#undef VECTOR
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@@ -382,6 +533,42 @@ dotprod_m128_add_dpbusd_epi32(int32x4_t& acc, int8x16_t a, int8x16_t b) {
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}
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#endif
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#if defined(USE_LASX)
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[[maybe_unused]] static int lasx_m256_hadd(__m256i sum, int bias) {
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__m256i v = sum;
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v = __lasx_xvadd_w(v, __lasx_xvshuf4i_w(v, 0x4E)); // [C,D,A,B] per lane
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v = __lasx_xvadd_w(v, __lasx_xvshuf4i_w(v, 0xB1)); // [B,A,D,C] per lane
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int lo_sum = (int) __lasx_xvpickve2gr_w(v, 0);
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int hi_sum = (int) __lasx_xvpickve2gr_w(v, 4);
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return lo_sum + hi_sum + bias;
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}
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[[maybe_unused]] static void lasx_m256_add_dpbusd_epi32(__m256i& acc, __m256i a, __m256i b) {
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__m256i tmp = __lasx_xvmulwev_h_bu_b(a, b);
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tmp = __lasx_xvmaddwod_h_bu_b(tmp, a, b);
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acc = __lasx_xvadd_w(acc, __lasx_xvhaddw_w_h(tmp, tmp));
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}
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#endif // USE_LASX
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#if defined(USE_LSX)
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[[maybe_unused]] static int lsx_m128_hadd(__m128i sum, int bias) {
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sum = __lsx_vadd_w(sum, __lsx_vshuf4i_w(sum, 0x4E)); // [C,D,A,B]
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sum = __lsx_vadd_w(sum, __lsx_vshuf4i_w(sum, 0xB1)); // [B,A,D,C]
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return __lsx_vpickve2gr_w(sum, 0) + bias;
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}
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[[maybe_unused]] static void lsx_m128_add_dpbusd_epi32(__m128i& acc, __m128i a, __m128i b) {
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// tmp[i] = a[2i]*b[2i] + a[2i+1]*b[2i+1]
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__m128i tmp = __lsx_vmulwev_h_bu_b(a, b);
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tmp = __lsx_vmaddwod_h_bu_b(tmp, a, b);
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acc = __lsx_vadd_w(acc, __lsx_vhaddw_w_h(tmp, tmp));
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}
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#endif // USE_LSX
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// Compute optimal SIMD register count for feature transformer accumulation.
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template<IndexType TransformedFeatureWidth, IndexType HalfDimensions, IndexType PSQTBuckets>
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