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anematodeandJoost VandeVondele
c3bcf74925
We maintain support for quite a few x86 ISA extensions but relied on the end
user to select the binary that is best for their system. We can detect at
runtime which architecture to use, and ship a single binary (per OS/ISA
combination). This PR does so, maintaining performance.
This is what I've landed on after quite a few iterations. Basically, we build
each arch separately, use `cpuid` to select one, and jump to that arch's main
function. Some details:
- The preprocessor macro `UNIVERSAL_BINARY` is defined when building for the universal binary.
- The Makefile target `universal-object-[no]pgo` is added, which produces a `stockfish.o` in each arch's build directory.
- To prevent symbol collisions between the multiple builds, we `#define Stockfish Stockfish_[arch]`. Furthermore we wrap the `main` function in `namespace Stockfish { }`.
- We can still get PGO data by linking to a per-arch binary, with `Stockfish_x86_64_avx2::main` as `main`, and running `bench`.
- For arches not supported by the host we can use Intel SDE – this is what we do in CI.
- When embedding the NNUE, we use C++26/C23 `#embed` instead of `INCBIN`. The issue with `INCBIN` is that it injects assembly directives that we have no control over.
- To ensure there's only one copy of the networks in the final binary, we define the network data as weak symbols in each per-arch build. Then, in the final link, we add a special nnue_embed.cpp which provides strong symbols.
- This does require GCC 15. Statically linking libstdc++ allows the binary to still run on older OSes though. And latest msys2 already does static linking + is based off GCC 15.2.0
building can be as simple as
make -j profile-build ARCH=x86-64-universal
or using the sde if the host doesn't support all architectures supported in the
universal binary, and the default host compiler is not recent enough.
make -j profile-build ARCH=x86-64-universal RUN_PREFIX="/path/to/sde -future --" CXX=g++-15
This change is also integrated in CI, so universal binaries are available as
downloadable artifacts.
Next we could also do ARM64, especially Android (all Apple silicon users use
the same binary). It also might be worth getting this to work with clang.
closes https://github.com/official-stockfish/Stockfish/pull/6740
No functional change
112 lines
3.4 KiB
C++
112 lines
3.4 KiB
C++
#include <cpuid.h>
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#include <stdio.h>
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#include <stdint.h>
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#define DEFINE_BUILD(x) \
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namespace Stockfish_##x { \
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extern int main(int argc, char* argv[]); \
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} \
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extern "C" void (*__start_##x##_init[])(void); \
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extern "C" void (*__stop_##x##_init[])(void); \
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int entry_##x(int argc, char* argv[]) { \
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unsigned count = __stop_##x##_init - __start_##x##_init; \
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for (unsigned i = 0; i < count; i++) \
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__start_##x##_init[i](); \
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return Stockfish_##x::main(argc, argv); \
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}
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DEFINE_BUILD(x86_64)
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DEFINE_BUILD(x86_64_sse41_popcnt)
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DEFINE_BUILD(x86_64_avx2)
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DEFINE_BUILD(x86_64_bmi2)
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DEFINE_BUILD(x86_64_avxvnni)
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DEFINE_BUILD(x86_64_avx512)
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DEFINE_BUILD(x86_64_vnni512)
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DEFINE_BUILD(x86_64_avx512icl)
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// Zen, Zen+ and Zen 2 (AMD family 17h) have microcoded pdep/pext
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static bool has_slow_bmi2() {
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unsigned int eax, ebx, ecx, edx;
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__cpuid(0, eax, ebx, ecx, edx);
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if (ebx != 0x68747541 || edx != 0x69746e65 || ecx != 0x444d4163) // "AuthenticAMD"
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return false;
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__cpuid(1, eax, ebx, ecx, edx);
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unsigned family = (eax >> 8) & 0xf;
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if (family == 0xf)
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family += (eax >> 20) & 0xff;
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return family == 0x17;
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}
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constexpr uint64_t XCR0_SSE_AVX_MASK = 0x06;
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constexpr uint64_t XCR0_AVX512_MASK = 0xE6;
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int main(int argc, char* argv[]) {
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unsigned _;
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unsigned max_leaf = __get_cpuid_max(0, &_);
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if (max_leaf < 1U)
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{
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return entry_x86_64(argc, argv);
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}
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unsigned int eax, ebx, ecx, edx;
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__cpuid(1, eax, ebx, ecx, edx);
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if (!(ecx & (1U << 19)) || !(ecx & (1U << 23)))
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{ // no popcnt or no sse4.1
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return entry_x86_64(argc, argv);
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}
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bool xgetbv_ok = (ecx & (1U << 27)) != 0; // OSXSAVE
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uint64_t xcr0 = 0;
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if (xgetbv_ok)
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{
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uint32_t xcr0_eax, xcr0_edx;
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uint32_t xcr0_ecx = 0;
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asm("xgetbv" : "=a"(xcr0_eax), "=d"(xcr0_edx) : "c"(xcr0_ecx));
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xcr0 = (static_cast<uint64_t>(xcr0_edx) << 32) | xcr0_eax;
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}
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bool leaf_supported = __get_cpuid_count(7, 0, &eax, &ebx, &ecx, &edx);
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if (!leaf_supported || !(ebx & (1U << 5)) || !xgetbv_ok
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|| (xcr0 & XCR0_SSE_AVX_MASK) != XCR0_SSE_AVX_MASK)
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{
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// CPUID query not supported, no avx2, missing xgetbv, or missing OS restore for AVX regs
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return entry_x86_64_sse41_popcnt(argc, argv);
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}
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if (!(ebx & (1U << 8)) || has_slow_bmi2())
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{ // no or slow bmi2
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return entry_x86_64_avx2(argc, argv);
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}
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if (!(ebx & (1U << 16)) || !(ebx & (1U << 31)) || !(ebx & (1U << 30))
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|| (xcr0 & XCR0_AVX512_MASK) != XCR0_AVX512_MASK)
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{
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// no avx512f/vl/bw, or OS doesn't restore AVX-512 regs
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bool leaf_supported = __get_cpuid_count(7, 1, &eax, &ebx, &ecx, &edx);
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if (leaf_supported && eax & (1U << 4))
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{ // avxvnni
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return entry_x86_64_avxvnni(argc, argv);
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}
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else
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{
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return entry_x86_64_bmi2(argc, argv);
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}
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}
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if (!(ecx & 1U << 11 /* vnni512 */))
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{
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return entry_x86_64_avx512(argc, argv);
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}
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if (!(ebx & 1U << 21 /* ifma */) || !(ecx & 1U << 1 /* vbmi */) || !(ecx & 1U << 6 /* vbmi2 */)
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|| !(ecx & 1U << 14 /* vpopcntdq */) || !(ecx & 1U << 12 /* bitalg */)
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|| !(ecx & 1U << 10 /* vpclmulqdq */) || !(ecx & 1U << 8 /* gfni */)
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|| !(ecx & 1U << 9 /* vaes */))
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{
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return entry_x86_64_vnni512(argc, argv);
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}
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return entry_x86_64_avx512icl(argc, argv);
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}
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