mirror of
https://github.com/official-stockfish/Stockfish.git
synced 2026-07-23 05:07:14 +00:00
DisservinandJoost VandeVondele
583e0c1c75
makes the main dispatch logic more easy to follow and possibly update closes https://github.com/official-stockfish/Stockfish/pull/6753 No functional change
115 lines
4.3 KiB
C++
115 lines
4.3 KiB
C++
#include <cpuid.h>
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#include <stdint.h>
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#define DEFINE_BUILD(x) \
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namespace Stockfish_##x { \
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extern int main(int argc, char* argv[]); \
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} \
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extern "C" void (*__start_##x##_init[])(void); \
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extern "C" void (*__stop_##x##_init[])(void); \
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int entry_##x(int argc, char* argv[]) { \
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unsigned count = __stop_##x##_init - __start_##x##_init; \
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for (unsigned i = 0; i < count; i++) \
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__start_##x##_init[i](); \
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return Stockfish_##x::main(argc, argv); \
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}
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DEFINE_BUILD(x86_64)
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DEFINE_BUILD(x86_64_sse41_popcnt)
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DEFINE_BUILD(x86_64_avx2)
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DEFINE_BUILD(x86_64_bmi2)
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DEFINE_BUILD(x86_64_avxvnni)
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DEFINE_BUILD(x86_64_avx512)
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DEFINE_BUILD(x86_64_vnni512)
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DEFINE_BUILD(x86_64_avx512icl)
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// AMD Zen/Zen+/Zen2 (family 17h) implement pdep/pext via microcode.
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static bool has_slow_bmi2() {
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return __builtin_cpu_is("amd") && (__builtin_cpu_is("znver1") || __builtin_cpu_is("znver2"));
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}
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struct CpuFeatures {
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bool sse41; // SSE4.1
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bool popcnt; // POPCNT
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bool avx2; // AVX2
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bool bmi2; // BMI2 (may be slow on AMD Zen/Zen+/Zen2)
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bool avx512f; // AVX-512 Foundation
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bool avx512vl; // AVX-512 Vector Length extensions
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bool avx512bw; // AVX-512 Byte and Word instructions
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bool avx512vnni; // AVX-512 Vector Neural Network Instructions
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bool avx512ifma; // AVX-512 Integer Fused Multiply-Add
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bool avx512vbmi; // AVX-512 Vector Bit Manipulation Instructions
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bool avx512vbmi2; // AVX-512 VBMI2
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bool avx512vpopcntdq; // AVX-512 VPOPCNTDQ
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bool avx512bitalg; // AVX-512 BITALG
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bool vpclmulqdq; // Carry-less multiplication (AVX512 variant)
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bool gfni; // Galois Field instructions
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bool vaes; // AES instructions (AVX512 variant)
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bool avxvnni; // AVX-VNNI (non-512 dot product instructions)
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};
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static CpuFeatures query_cpu_features() {
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return {
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.sse41 = (bool) __builtin_cpu_supports("sse4.1"),
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.popcnt = (bool) __builtin_cpu_supports("popcnt"),
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.avx2 = (bool) __builtin_cpu_supports("avx2"),
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.bmi2 = (bool) __builtin_cpu_supports("bmi2"),
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.avx512f = (bool) __builtin_cpu_supports("avx512f"),
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.avx512vl = (bool) __builtin_cpu_supports("avx512vl"),
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.avx512bw = (bool) __builtin_cpu_supports("avx512bw"),
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.avx512vnni = (bool) __builtin_cpu_supports("avx512vnni"),
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.avx512ifma = (bool) __builtin_cpu_supports("avx512ifma"),
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.avx512vbmi = (bool) __builtin_cpu_supports("avx512vbmi"),
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.avx512vbmi2 = (bool) __builtin_cpu_supports("avx512vbmi2"),
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.avx512vpopcntdq = (bool) __builtin_cpu_supports("avx512vpopcntdq"),
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.avx512bitalg = (bool) __builtin_cpu_supports("avx512bitalg"),
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.vpclmulqdq = (bool) __builtin_cpu_supports("vpclmulqdq"),
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.gfni = (bool) __builtin_cpu_supports("gfni"),
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.vaes = (bool) __builtin_cpu_supports("vaes"),
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.avxvnni = (bool) __builtin_cpu_supports("avxvnni"),
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};
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}
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// Selects the most capable ISA variant supported by this CPU and OS
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static int dispatch(const CpuFeatures& f, int argc, char* argv[]) {
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if (!f.sse41 || !f.popcnt)
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return entry_x86_64(argc, argv);
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if (!f.avx2)
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return entry_x86_64_sse41_popcnt(argc, argv);
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if (!f.bmi2 || has_slow_bmi2())
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return entry_x86_64_avx2(argc, argv);
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if (!f.avx512f || !f.avx512vl || !f.avx512bw)
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{
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if (f.avxvnni)
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return entry_x86_64_avxvnni(argc, argv);
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return entry_x86_64_bmi2(argc, argv);
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}
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if (!f.avx512vnni)
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return entry_x86_64_avx512(argc, argv);
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// AVX512ICL requires the full Icelake-client feature suite
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if (!f.avx512ifma //
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|| !f.avx512vbmi //
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|| !f.avx512vbmi2 //
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|| !f.avx512vpopcntdq //
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|| !f.avx512bitalg //
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|| !f.vpclmulqdq //
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|| !f.gfni //
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|| !f.vaes //
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)
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return entry_x86_64_vnni512(argc, argv);
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return entry_x86_64_avx512icl(argc, argv);
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}
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int main(int argc, char* argv[]) {
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__builtin_cpu_init();
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CpuFeatures features = query_cpu_features();
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return dispatch(features, argc, argv);
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} |