mirror of
https://github.com/official-stockfish/Stockfish.git
synced 2026-07-22 12:47:08 +00:00
Add wasm32 and wasm32-relaxed-simd targets, and light optimizations
Lichess maintains some patches on top of SF dev to get it working with Emscripten. This PR moves some of these patches into SF and adds WASM to CI. It also adds a few changes in places where the x86 intrinsics don't cleanly map onto WebAssembly SIMD instructions; otherwise, we use Emscripten's x86 compatibility layer and take SSE4.1 code paths.
Summary of the compatibility changes:
- Define `wasm32` and `wasm32-relaxed-simd` targets.
- We don't support wasm without SIMD; it'd be a waste of time.
- Add option to disable TBs
- This is required because `tbprobe.cpp` pulls in `mmap`. This option can be used on any target, of course, but it's only enabled by default for wasm.
- Add compilation job + test to CI
And the changes for performance:
- Disable atomics for shared history on wasm
- Atomics are always `seq_cst` there, which can be quite slow (even on the x86, stores are locked `xchg [mem], reg`)
- Add SSE code path to `get_changed_pieces`, modeled after the AVX2 path
- `_mm_mulhi_epi16` has a complicated emulation sequence, so for the pairwise multiplication, use an approach similar to the NEON impl.
- __int128 is gets lowered to runtime functions on wasm, so use the fallback impl for `mul_hi64`
- V8 does a poor job with the NNZ finding, so use a slightly different sequence there
- Add relaxed simd support for `m128_dpbusd`.
Some local perf figures (single-threaded speedtest):
```
wasm
Nodes/second : 902523
sse4.1
Nodes/second : 1155380
avx512icl
Nodes/second : 1676184
```
Further avenues to explore:
- Optimize for performance under V8's experimental AVX revectorizer (Currently it's about +10% in my testing, but could definittely be more)
- Branch hinting. For example, run bench while collecting branch frequency info, then inject it late in the WASM compilation pipeline. I tried this locally and it didn't help much, but maybe I'm missing something.
- PGO. Gives +1.5% NPS locally, but hard to integrate with WASM compilation wrokflows
closes https://github.com/official-stockfish/Stockfish/pull/6875
No functional change
This commit is contained in:
anematode
committed by
Joost VandeVondele
Joost VandeVondele
parent
dd3e1c4a50
commit
8e711c29fe
@@ -150,6 +150,10 @@ jobs:
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name: Compiler check
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if: ${{ always() }}
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uses: ./.github/workflows/avx2_compilers.yml
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WASMCompilation:
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name: WASM compilation
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if: ${{ always() }}
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uses: ./.github/workflows/wasm_compilation.yml
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# Release Jobs
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ARMCompilation:
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name: Android builds
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@@ -0,0 +1,51 @@
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name: WASM Compilation
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on:
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workflow_call:
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jobs:
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wasm:
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name: wasm (${{ matrix.arch }})
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runs-on: ubuntu-latest
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strategy:
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fail-fast: false
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matrix:
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arch: [wasm32, wasm32-relaxed-simd]
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defaults:
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run:
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working-directory: src
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shell: bash
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steps:
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- uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
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with:
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fetch-depth: 0
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persist-credentials: false
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- name: Install emsdk
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working-directory: .
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run: |
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git clone --depth 1 https://github.com/emscripten-core/emsdk.git
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cd emsdk
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./emsdk install latest
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./emsdk activate latest
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- name: Extract the bench number from the commit history
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run: |
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for hash in $(git rev-list -100 HEAD); do
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benchref=$(git show -s $hash | tac | grep -m 1 -o -x '[[:space:]]*\b[Bb]ench[ :]\+[1-9][0-9]\{5,7\}\b[[:space:]]*' | sed 's/[^0-9]//g') && break || true
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done
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[[ -n "$benchref" ]] && echo "benchref=$benchref" >> $GITHUB_ENV && echo "From commit: $hash" && echo "Reference bench: $benchref" || echo "No bench found"
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- name: Download the used network from the fishtest framework
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run: make net
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- name: Build ${{ matrix.arch }} build
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run: |
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source $GITHUB_WORKSPACE/emsdk/emsdk_env.sh
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em++ --version
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net=$(grep -oE 'nn-[0-9a-f]+\.nnue' evaluate.h | head -1)
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make clean
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COMPCXX=em++ make -j build ARCH=${{ matrix.arch }} EXTRALDFLAGS="--preload-file $net"
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- name: Verify bench under node
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run: EXE=./stockfish.js RUN_PREFIX=node ../tests/signature.sh $benchref
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+53
-5
@@ -55,6 +55,8 @@ endif
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### Executable name
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ifeq ($(target_windows),yes)
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EXE = stockfish.exe
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else ifneq (,$(findstring wasm,$(ARCH)))
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EXE = stockfish.js
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else
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EXE = stockfish
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endif
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@@ -122,7 +124,9 @@ VPATH = syzygy:nnue:nnue/features
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# neon = yes/no --- -DUSE_NEON --- Use ARM SIMD architecture
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# dotprod = yes/no --- -DUSE_NEON_DOTPROD --- Use ARM advanced SIMD Int8 dot product instructions
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# lsx = yes/no --- -mlsx --- Use Loongson SIMD eXtension
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# lasx = yes/no --- -mlasx --- use Loongson Advanced SIMD eXtension
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# lasx = yes/no --- -mlasx --- Use Loongson Advanced SIMD eXtension
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# relaxedsimd = y/n --- -mrelaxed-simd --- Use WebAssembly relaxed SIMD extension
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# syzygy = yes/no --- -DNO_TABLEBASES --- Support Syzygy tablebase probing
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#
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# Note that Makefile is space sensitive, so when adding new architectures
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# or modifying existing flags, you have to make sure there are no extra spaces
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@@ -149,7 +153,7 @@ ifeq ($(ARCH), $(filter $(ARCH), \
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x86-64-bmi2 x86-64-avx2 x86-64-sse41-popcnt x86-64-modern x86-64-ssse3 x86-64-sse3-popcnt \
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x86-64 x86-32-sse41-popcnt x86-32-sse2 x86-32 ppc-64 ppc-64-altivec ppc-64-vsx ppc-32 e2k \
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armv7 armv7-neon armv8 armv8-dotprod arm64-universal apple-silicon general-64 general-32 riscv64 \
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loongarch64 loongarch64-lsx loongarch64-lasx))
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loongarch64 loongarch64-lsx loongarch64-lasx wasm32 wasm32-relaxed-simd))
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SUPPORTED_ARCH=true
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else
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SUPPORTED_ARCH=false
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@@ -186,6 +190,8 @@ dotprod = no
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arm_version = 0
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lsx = no
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lasx = no
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relaxedsimd = no
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syzygy = yes
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STRIP = strip
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ifneq ($(shell which clang-format-20 2> /dev/null),)
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@@ -389,6 +395,27 @@ ifeq ($(ARCH),apple-silicon)
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arm_version = 8
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endif
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# WASM is largely compiled using emcc's x86 compatibility layer, with occasional
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# WASM-specific intrinsics
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ifeq ($(ARCH),wasm32)
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arch = wasm32
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sse = yes
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sse2 = yes
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ssse3 = yes
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sse41 = yes
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syzygy = no
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endif
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ifeq ($(ARCH),wasm32-relaxed-simd)
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arch = wasm32
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sse = yes
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sse2 = yes
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ssse3 = yes
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sse41 = yes
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relaxedsimd = yes
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syzygy = no
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endif
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ifeq ($(ARCH),ppc-32)
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arch = ppc
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bits = 32
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@@ -480,7 +507,7 @@ ifeq ($(COMP),gcc)
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endif
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else ifeq ($(arch),loongarch64)
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CXXFLAGS += -latomic
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else
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else ifneq ($(arch),wasm32)
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CXXFLAGS += -m$(bits)
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LDFLAGS += -m$(bits)
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endif
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@@ -490,8 +517,10 @@ ifeq ($(COMP),gcc)
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endif
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ifneq ($(KERNEL),Darwin)
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ifneq ($(arch),wasm32)
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LDFLAGS += -Wl,--no-as-needed
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endif
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endif
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endif
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ifeq ($(target_windows),yes)
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@@ -654,6 +683,7 @@ ifneq ($(comp),mingw)
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# Haiku has pthreads in its libroot, so only link it in on other platforms
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ifneq ($(KERNEL),Haiku)
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ifneq ($(COMP),ndk)
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ifneq ($(arch),wasm32)
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LDFLAGS += -lpthread
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add_lrt = yes
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@@ -669,6 +699,7 @@ ifneq ($(comp),mingw)
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LDFLAGS += -lrt
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endif
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endif
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endif
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endif
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endif
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endif
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@@ -846,6 +877,14 @@ ifeq ($(lsx),yes)
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endif
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endif
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ifeq ($(arch),wasm32)
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CXXFLAGS += -pthread -msimd128 -DUSE_POPCNT -DNNUE_EMBEDDING_OFF
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LDFLAGS += -pthread -sINITIAL_MEMORY=64MB -sALLOW_MEMORY_GROWTH -sSTACK_SIZE=3MB
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ifeq ($(relaxedsimd),yes)
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CXXFLAGS += -mrelaxed-simd
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endif
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endif
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### 3.7 pext
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ifeq ($(pext),yes)
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CXXFLAGS += -DUSE_PEXT
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@@ -854,6 +893,11 @@ ifeq ($(pext),yes)
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endif
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endif
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### Syzygy tablebases
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ifeq ($(syzygy),no)
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CXXFLAGS += -DNO_TABLEBASES
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endif
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### 3.8.1 Try to include git info for versioning and avoid recompiles if nothing changes
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BUILD_SHA_FILE := .build_sha.txt
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BUILD_DATE_FILE := .build_date.txt
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@@ -885,7 +929,8 @@ endif
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### needs access to the optimization flags.
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ifeq ($(optimize),yes)
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ifeq ($(debug),no)
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ifneq ($(KERNEL),Darwin)
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ifeq ($(arch),wasm32)
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else ifneq ($(KERNEL),Darwin)
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LLD_BIN := $(shell command -v ld.lld 2>/dev/null)
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ifeq ($(LLD_BIN),)
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LLD_BIN := $(shell command -v lld 2>/dev/null)
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@@ -1207,6 +1252,7 @@ config-sanity: net
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echo "arm_version: '$(arm_version)'" && \
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echo "lsx: '$(lsx)'" && \
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echo "lasx: '$(lasx)'" && \
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echo "syzygy: '$(syzygy)'" && \
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echo "target_windows: '$(target_windows)'" && \
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echo "" && \
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echo "Flags:" && \
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@@ -1222,7 +1268,8 @@ config-sanity: net
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(test "$(arch)" = "any" || test "$(arch)" = "x86_64" || test "$(arch)" = "i386" || \
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test "$(arch)" = "ppc64" || test "$(arch)" = "ppc" || test "$(arch)" = "e2k" || \
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test "$(arch)" = "armv7" || test "$(arch)" = "armv8" || test "$(arch)" = "arm64" || \
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test "$(arch)" = "riscv64" || test "$(arch)" = "loongarch64") && \
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test "$(arch)" = "riscv64" || test "$(arch)" = "loongarch64" || \
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test "$(arch)" = "wasm32") && \
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(test "$(bits)" = "32" || test "$(bits)" = "64") && \
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(test "$(prefetch)" = "yes" || test "$(prefetch)" = "no") && \
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(test "$(popcnt)" = "yes" || test "$(popcnt)" = "no") && \
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@@ -1241,6 +1288,7 @@ config-sanity: net
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(test "$(neon)" = "yes" || test "$(neon)" = "no") && \
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(test "$(lsx)" = "yes" || test "$(lsx)" = "no") && \
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(test "$(lasx)" = "yes" || test "$(lasx)" = "no") && \
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(test "$(syzygy)" = "yes" || test "$(syzygy)" = "no") && \
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(test "$(comp)" = "gcc" || test "$(comp)" = "icx" || test "$(comp)" = "mingw" || \
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test "$(comp)" = "clang" || test "$(comp)" = "armv7a-linux-androideabi16-clang" || \
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test "$(comp)" = "aarch64-linux-android21-clang")
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+7
-1
@@ -52,11 +52,17 @@ static_assert((CORRHIST_BASE_SIZE & (CORRHIST_BASE_SIZE - 1)) == 0,
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// the entry. The first template parameter T is the base type of the array,
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// and the second template parameter D limits the range of updates in [-D, D]
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// when we update values with the << operator
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template<typename T, int D, bool Atomic = false>
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template<typename T, int D, bool Shared = false>
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struct StatsEntry {
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static_assert(std::is_arithmetic_v<T>, "Not an arithmetic type");
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private:
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static constexpr bool Atomic =
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#ifdef __wasm__
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false; // don't use atomics on WASM as they are always seq_cst
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#else
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Shared;
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#endif
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std::conditional_t<Atomic, std::atomic<T>, T> entry;
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public:
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+3
-3
@@ -384,12 +384,12 @@ class PRNG {
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}
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};
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inline u64 mul_hi64(u64 a, u64 b) {
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#if defined(__GNUC__) && defined(IS_64BIT)
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inline usize mul_hi64(u64 a, usize b) {
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#if defined(__GNUC__) && defined(IS_64BIT) && !defined(__wasm__)
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return (u128(a) * u128(b)) >> 64;
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#else
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u64 aL = u32(a), aH = a >> 32;
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u64 bL = u32(b), bH = b >> 32;
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u64 bL = u32(b), bH = u64(b) >> 32;
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u64 c1 = (aL * bL) >> 32;
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u64 c2 = aH * bL + c1;
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u64 c3 = aL * bH + u32(c2);
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@@ -561,6 +561,19 @@ Bitboard get_changed_pieces(const std::array<Piece, SQUARE_NB>& oldPieces,
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uint8x8_t sameBB = vshrn_n_u16(vreinterpretq_u16_u8(merged), 4);
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return ~vget_lane_u64(vreinterpret_u64_u8(sameBB), 0);
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#elif defined(USE_SSE2)
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Bitboard sameBB = 0;
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for (int i = 0; i < 64; i += 16)
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{
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const __m128i old_v = _mm_loadu_si128(reinterpret_cast<const __m128i*>(&oldPieces[i]));
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const __m128i new_v = _mm_loadu_si128(reinterpret_cast<const __m128i*>(&newPieces[i]));
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const __m128i same = _mm_cmpeq_epi8(old_v, new_v);
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sameBB |= static_cast<Bitboard>(_mm_movemask_epi8(same)) << i;
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}
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return ~sameBB;
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#else
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Bitboard changed = 0;
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@@ -233,11 +233,9 @@ class FeatureTransformer {
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static_assert((HalfDimensions / 2) % OutputChunkSize == 0);
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constexpr IndexType NumOutputChunks = HalfDimensions / 2 / OutputChunkSize;
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#if !defined(USE_NEON)
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const vec_t Zero = vec_zero();
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const vec_t FtMax = vec_set_16(FtMaxVal);
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constexpr int shift = 7;
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#endif
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[[maybe_unused]] const vec_t Zero = vec_zero();
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[[maybe_unused]] const vec_t FtMax = vec_set_16(FtMaxVal);
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[[maybe_unused]] constexpr int shift = 7;
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const vec_t* in0 = reinterpret_cast<const vec_t*>(&(accumulation[perspectives[p]][0]));
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const vec_t* in1 =
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@@ -323,6 +321,19 @@ class FeatureTransformer {
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vec_t hi = vec_mulhi_8(pa, pb);
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vec_t result = vec_srli_8(hi, 1);
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#elif defined(__wasm__)
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// _mm_mulhi_epi16 is lowered to 32-bit multiplies, so we take
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// a similar approach as the NEON path.
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vec_t mul0 = vec_packus_16(acc0a, acc0b);
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vec_t mul1 = vec_packus_16(acc1a, acc1b);
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vec_t low = wasm_u16x8_extmul_low_u8x16(mul0, mul1);
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vec_t hi = wasm_u16x8_extmul_high_u8x16(mul0, mul1);
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// equivalent to vuzp2_u8
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vec_t merged = wasm_i8x16_shuffle(low, hi, 1, 3, 5, 7, 9, 11, 13, 15, 17, 19,
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21, 23, 25, 27, 29, 31);
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vec_t result = wasm_u8x16_shr(merged, 1);
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#else
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vec_t sum0a = vec_slli_16(vec_max_16(vec_min_16(acc0a, FtMax), Zero), shift);
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vec_t sum0b = vec_slli_16(vec_max_16(vec_min_16(acc0b, FtMax), Zero), shift);
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@@ -132,6 +132,10 @@ struct NNZInfo {
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const uint16x8_t bits = vandq_u16(packed, vld1q_u16(Mask8));
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*out++ = vaddvq_u16(bits);
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#elif defined(__wasm__)
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__m128i packed = _mm_packus_epi32(neurons1, neurons2);
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packed = _mm_packs_epi16(packed, packed);
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*out++ = ~_mm_movemask_epi8(_mm_cmpeq_epi8(packed, _mm_setzero_si128()));
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#else
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auto m1 = vec_nnz(neurons1);
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auto m2 = vec_nnz(neurons2);
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+10
-2
@@ -168,7 +168,12 @@ inline __m128i _mm_cvtsi64_si128(i64 val) {
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#endif
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#ifdef USE_SSE41
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#define vec_convert_8_16(a) _mm_cvtepi8_epi16(_mm_cvtsi64_si128(static_cast<i64>(a)))
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#ifdef __wasm__
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#define vec_convert_8_16(a) wasm_i16x8_load8x8(reinterpret_cast<const void*>(&a))
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#else
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#define vec_convert_8_16(a) \
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_mm_cvtepi8_epi16(_mm_cvtsi64_si128(static_cast<int64_t>(a)))
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#endif
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#else
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// Credit: Yoshie2000
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inline __m128i vec_convert_8_16(u64 x) {
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@@ -495,10 +500,13 @@ fused(const typename VecWrapper::type& in, const T& operand, const Ts&... operan
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}
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[[maybe_unused]] static void m128_add_dpbusd_epi32(__m128i& acc, __m128i a, __m128i b) {
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#if defined(__wasm_relaxed_simd__)
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acc = wasm_i32x4_relaxed_dot_i8x16_i7x16_add(b, a, acc);
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#else
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__m128i product0 = _mm_maddubs_epi16(a, b);
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product0 = _mm_madd_epi16(product0, _mm_set1_epi16(1));
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acc = _mm_add_epi32(acc, product0);
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#endif
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}
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#endif
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+53
-17
@@ -59,6 +59,40 @@
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#include <windows.h>
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#endif
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#ifdef NO_TABLEBASES
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||||
|
||||
// Stubbed out impls
|
||||
namespace Stockfish::Tablebases {
|
||||
|
||||
int MaxCardinality;
|
||||
|
||||
void init(const std::string&) {}
|
||||
|
||||
WDLScore probe_wdl(Position&, ProbeState* result) {
|
||||
*result = FAIL;
|
||||
return WDLDraw;
|
||||
}
|
||||
|
||||
int probe_dtz(Position&, ProbeState* result) {
|
||||
*result = FAIL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
bool root_probe(Position&, Search::RootMoves&, bool, bool, const std::function<bool()>&) {
|
||||
return false;
|
||||
}
|
||||
|
||||
bool root_probe_wdl(Position&, Search::RootMoves&, bool) { return false; }
|
||||
|
||||
Config rank_root_moves(
|
||||
const OptionsMap&, Position&, Search::RootMoves&, bool, const std::function<bool()>&) {
|
||||
return Config{};
|
||||
}
|
||||
|
||||
} // namespace Stockfish::Tablebases
|
||||
|
||||
#else
|
||||
|
||||
using namespace Stockfish::Tablebases;
|
||||
|
||||
int Stockfish::Tablebases::MaxCardinality;
|
||||
@@ -206,11 +240,11 @@ class TBFile: public std::ifstream {
|
||||
|
||||
TBFile(const std::string& f) {
|
||||
|
||||
#ifndef _WIN32
|
||||
#ifndef _WIN32
|
||||
constexpr char SepChar = ':';
|
||||
#else
|
||||
#else
|
||||
constexpr char SepChar = ';';
|
||||
#endif
|
||||
#endif
|
||||
std::stringstream ss(Paths);
|
||||
std::string path;
|
||||
|
||||
@@ -228,7 +262,7 @@ class TBFile: public std::ifstream {
|
||||
if (is_open())
|
||||
close(); // Need to re-open to get native file descriptor
|
||||
|
||||
#ifndef _WIN32
|
||||
#ifndef _WIN32
|
||||
struct stat statbuf;
|
||||
int fd = ::open(fname.c_str(), O_RDONLY);
|
||||
|
||||
@@ -245,9 +279,9 @@ class TBFile: public std::ifstream {
|
||||
|
||||
*mapping = statbuf.st_size;
|
||||
*baseAddress = mmap(nullptr, statbuf.st_size, PROT_READ, MAP_SHARED, fd, 0);
|
||||
#if defined(MADV_RANDOM)
|
||||
#if defined(MADV_RANDOM)
|
||||
madvise(*baseAddress, statbuf.st_size, MADV_RANDOM);
|
||||
#endif
|
||||
#endif
|
||||
::close(fd);
|
||||
|
||||
if (*baseAddress == MAP_FAILED)
|
||||
@@ -255,7 +289,7 @@ class TBFile: public std::ifstream {
|
||||
std::cerr << "Could not mmap() " << fname << std::endl;
|
||||
exit(EXIT_FAILURE);
|
||||
}
|
||||
#else
|
||||
#else
|
||||
// Note FILE_FLAG_RANDOM_ACCESS is only a hint to Windows and as such may get ignored.
|
||||
HANDLE fd = CreateFileA(fname.c_str(), GENERIC_READ, FILE_SHARE_READ, nullptr,
|
||||
OPEN_EXISTING, FILE_FLAG_RANDOM_ACCESS, nullptr);
|
||||
@@ -290,7 +324,7 @@ class TBFile: public std::ifstream {
|
||||
<< ", error = " << GetLastError() << std::endl;
|
||||
exit(EXIT_FAILURE);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
u8* data = (u8*) *baseAddress;
|
||||
|
||||
constexpr u8 Magics[][4] = {{0xD7, 0x66, 0x0C, 0xA5}, {0x71, 0xE8, 0x23, 0x5D}};
|
||||
@@ -307,12 +341,12 @@ class TBFile: public std::ifstream {
|
||||
|
||||
static void unmap(void* baseAddress, u64 mapping) {
|
||||
|
||||
#ifndef _WIN32
|
||||
#ifndef _WIN32
|
||||
munmap(baseAddress, mapping);
|
||||
#else
|
||||
#else
|
||||
UnmapViewOfFile(baseAddress);
|
||||
CloseHandle((HANDLE) mapping);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
};
|
||||
|
||||
@@ -728,12 +762,12 @@ int map_score(TBTable<DTZ>* entry, File f, int value, WDLScore wdl) {
|
||||
return value + 1;
|
||||
}
|
||||
|
||||
// A temporary fix for the compiler bug with vectorization. (#4450)
|
||||
#if defined(__clang__) && defined(__clang_major__) && __clang_major__ >= 15
|
||||
#define DISABLE_CLANG_LOOP_VEC _Pragma("clang loop vectorize(disable)")
|
||||
#else
|
||||
#define DISABLE_CLANG_LOOP_VEC
|
||||
#endif
|
||||
// A temporary fix for the compiler bug with vectorization. (#4450)
|
||||
#if defined(__clang__) && defined(__clang_major__) && __clang_major__ >= 15
|
||||
#define DISABLE_CLANG_LOOP_VEC _Pragma("clang loop vectorize(disable)")
|
||||
#else
|
||||
#define DISABLE_CLANG_LOOP_VEC
|
||||
#endif
|
||||
|
||||
// Compute a unique index out of a position and use it to probe the TB file. To
|
||||
// encode k pieces of the same type and color, first sort the pieces by square in
|
||||
@@ -1802,3 +1836,5 @@ Config Tablebases::rank_root_moves(const OptionsMap& options,
|
||||
return config;
|
||||
}
|
||||
} // namespace Stockfish
|
||||
|
||||
#endif // NO_TABLEBASES
|
||||
|
||||
+2
-1
@@ -18,7 +18,8 @@ error()
|
||||
trap 'error ${LINENO}' ERR
|
||||
|
||||
# obtain
|
||||
eval "$RUN_PREFIX ./stockfish bench" > "$STDOUT_FILE" 2> "$STDERR_FILE" || error ${LINENO}
|
||||
EXE=${EXE:-./stockfish}
|
||||
eval "$RUN_PREFIX $EXE bench" > "$STDOUT_FILE" 2> "$STDERR_FILE" || error ${LINENO}
|
||||
signature=$(grep "Nodes searched : " "$STDERR_FILE" | awk '{print $4}')
|
||||
|
||||
rm -f "$STDOUT_FILE" "$STDERR_FILE"
|
||||
|
||||
Reference in New Issue
Block a user